CPU
| CPU:Xilinx Zynq-7000 XC7Z007S/XC7Z014S/XC7Z010/XC7Z020-2CLG400I
|
1/2x ARM Cortex-A9,主頻766MHz,2.5DMIPS/MHz Per Core
|
1x Artix-7架構(gòu)可編程邏輯資源
|
ROM
| PS端:4/8GByte eMMC
|
PS端:256Mbit SPI NOR FLASH
|
RAM
| PS端:?jiǎn)瓮ǖ?2bit DDR總線,512M/1GByte DDR3
|
Logic Cells
| XC7Z007S:23K,XC7Z014S:65K,XC7Z010:28K,XC7Z020:85K
|
OSC
| PS端:33.33MHz
|
PL端:25MHz
|
B2B Connector
| 2x 80pin公座B2B連接器,2x 80pin母座B2B連接器,共320pin,間距0.5mm,合高4.0mm
|
LED
| 2x電源指示燈(核心板1個(gè),底板1個(gè))
|
3x PS端用戶可編程指示燈(核心板2個(gè),底板1個(gè))
|
4x PL端用戶可編程指示燈(核心板1個(gè),底板3個(gè))
|
1x PL端DONE指示燈(核心板)
|
KEY
| 1x 電源復(fù)位按鍵
|
1x 系統(tǒng)復(fù)位按鍵
|
1x PS端用戶輸入按鍵
|
3x PL端用戶輸入按鍵
|
1x PL端PROGRAM_B按鍵
|
SD
| 1x Micro SD接口(PS端)
|
CAMERA
| 2x CAMERA,2x 10pin排母方式,間距2.54mm(PL端)
|
Ethernet
| 1x RGMII,RJ45接口,10/100/1000M自適應(yīng)(PS端)
|
USB
| 1x USB 2.0 HOST接口(PS端)
|
UART
| 2x Debug UART,分別為PS、PL端調(diào)試串口,由同一個(gè)Micro USB接口引出
|
CAN
| 1x CAN,3pin 3.81mm綠色端子方式(PL端)
|
IO
| 1x 48pin公座歐式端子,間距2.54mm(PL端)
|
1x 排針拓展接口,2x 17pin規(guī)格,間距2.54mm(PL端)
|
JTAG
| 1x 14pin JTAG接口,間距2.0mm
|
BOOT SET
| 1x 6bit啟動(dòng)方式選擇撥碼開(kāi)關(guān)
|
SWITCH
| 1x電源搖頭開(kāi)關(guān)
|
POWER
| 1x 12V2A直流輸入DC417電源接口,外徑4.4mm,內(nèi)徑1.65mm
|