求助帖求大神幫我看看這個(gè)要怎么仿真？

QQ1641085143 · 發(fā)表于 2022-7-18 15:06:53

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity taxi is
port(clk:in std_logic;
   start:in std_logic;
   stop:in std_logic;
   pause:in std_logic;
   speedup:in std_logic_vector(1 downto 0);
   money:out integer range 0 to 8000;
   distance:out integer range 0 to 8000);
end;
architecture one of taxi is
begin
process(clk,start,stop,pause,speedup)
   variable money_reg,distance_reg:integer range 0 to 8000;
   variable num:integer range 0 to 9;
   variable dis:integer range 0 to 100;
   variable d:std_logic;
begin
if stop='1'then
   money_reg:=0;
   distance_reg:=0;
   dis:=0;
   num:=0;
elsif start='1'then
   money_reg:=600;
   distance_reg:=0;
   dis:=0;
   num:=0;
elsif clk'event and clk='1'then
   if start='0'and speedup="00"and pause='0'  and stop='0'then
         if num=9 then
               num:=0;
               distance_reg:=distance_reg+1;
               dis:=dis+1;
            else num:=num+1;
            end if;
elsif start='0'and speedup="01"and pause='0'and stop='0'then
if num=9 then
      num:=0;
      distance_reg:=distance_reg+2;
      dis:=dis+2;
   else num:=num+1;
   end if;
elsif start='0'and speedup="10"and pause='0'and stop='0'then
if num=9 then
      num:=0;
      distance_reg:=distance_reg+5;
      dis:=dis+5;
else num:=num+1;
end if;
elsif start='0'and speedup="11"and pause='0'and stop='0'then
         distance_reg:=distance_reg+1;
      dis:=dis+1;
end if;
if dis>=100then
      d:='1';
      dis:=0;
   else d:='0';
end if;
if distance_reg>=300 then
   if money_reg<2000and d='1'then
            money_reg:=money_reg+120;
   elsif money_reg>=2000 and d='1'then
         money_reg:=money_reg+180;
   end if;
end if;
end if;
money<=money_reg;
distance<=distance_reg;
end process;
end;
程序是這樣的，

xiaozhubanna · 發(fā)表于 2022-7-18 15:13:04

媽耶，這怎么看

張翔10 · 發(fā)表于 2022-7-18 15:12:10

引腳怎么配啊

12tian · 發(fā)表于 2022-7-18 15:11:10

自頂大神在哪里？

我和玲佑有個(gè)約 · 發(fā)表于 2022-7-18 15:11:04

哦不是仿真圖是將兩個(gè)模塊的連接到一起的原理圖

zeng119 · 發(fā)表于 2022-7-18 15:10:41

求大神幫我仿能真一波并且把這兩個(gè)模塊的接線后的仿真也做一下謝謝了畢業(yè)設(shè)計(jì)現(xiàn)在就差這一步了下圖是連接完成的仿真圖

huangdongqiang · 發(fā)表于 2022-7-18 15:10:35

沒(méi)人嗎？

朱威斯 · 發(fā)表于 2022-7-18 15:09:35

第二個(gè)模塊的仿真哪一步是上面這個(gè)圖

我應(yīng)該 · 發(fā)表于 2022-7-18 15:09:05

朱威斯 · 發(fā)表于 2022-7-18 15:08:19

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity decoder is
port(clk20mhz:in std_logic;
   money_in:in integer range 0to 8000;
distance_in:in integer range 0 to 8000;
scan:out std_logic_vector(7 downto 0);
seg7:out std_logic_vector(6 downto 0);
dp:out std_logic);
end;
architecture one of decoder is
signal clk1khz:std_logic;
signal data:std_logic_vector(3 downto 0);
signal m_one,m_ten,m_hun,m_tho:std_logic_vector(3 downto 0 );
signal d_one,d_ten,d_hun,d_tho:std_logic_vector(3 downto 0);
begin
process(clk20mhz)
variable count:integer range 0 to 9999;
begin
if clk20mhz'event and clk20mhz='1'then
if count=9999 then clk1khz<=not clk1khz;count:=0;
else count:=count+1;
end if;
end if;
end process;
process(clk20mhz,money_in)
   variable comb1:integer range 0 to 8000;
variable comb1_a,comb1_b,comb1_c,comb1_d:std_logic_vector(3 downto 0);
begin
if clk20mhz'event and clk20mhz='1'then
   if comb1<money_in then
   if comb1_a=9 and comb1_b=9 and comb1_c=9 then
   comb1_a:="0000";
comb1_b:="0000";
comb1_c:="0000";
comb1_d:=comb1_d+1;
comb1:=comb1+1;
elsif comb1_a=9 and comb1_b=9 then
comb1_a:="0000";
comb1_b:="0000";
comb1_c:=comb1_c+1;
comb1:=comb1+1;
elsif comb1_a=9 then
   comb1_a:="0000";
comb1_b:=comb1_b+1;
comb1:=comb1+1;
else
   comb1_a:=comb1_a+1;
comb1:=comb1+1;
  end if;
  elsif comb1=money_in then
   m_one<=comb1_a;
m_ten<=comb1_b;
m_hun<=comb1_c;
m_tho<=comb1_d;
elsif comb1>money_in then
         comb1_a:="0000";
   comb1_b:="0000";
comb1_c:="0000";
   comb1_d:="0000";
comb1:=0;
end if;
end if;
end process;
process(clk20mhz,distance_in)
   variable comb2:integer range 0 to 8000;
variable comb2_a,comb2_b,comb2_c,comb2_d:std_logic_vector(3 downto 0);
begin
if clk20mhz'event and clk20mhz='1'then
   if comb2<distance_in then
         if comb2_a=9 and comb2_b=9 and comb2_c=9 then
               comb2_a:="0000";
      comb2_b:="0000";
      comb2_c:="0000";
comb2_d:=comb2_d+1;
comb2:=comb2+1;
elsif comb2_a=9 and comb2_b=9 then
         comb2_a:="0000";
   comb2_b:="0000";
comb2_c:=comb2_c+1;
comb2:=comb2+1;
elsif comb2_a=9 then
         comb2_a:="0000";
   comb2_b:=comb2_b+1;
   comb2:=comb2+1;
else
            comb2_a:=comb2_a+1;
   comb2:=comb2+1;
end if;
   elsif comb2=distance_in then
            d_one<=comb2_a;
      d_ten<=comb2_b;
   d_hun<=comb2_c;
   d_tho<=comb2_d;
elsif comb2>distance_in then
            comb2_a:="0000";
      comb2_b:="0000";
      comb2_c:="0000";
      comb2_d:="0000";
      comb2:=0;
end if;
end if;
end process;
process(clk1khz,m_one,m_ten,m_hun,m_tho,d_one,d_ten,d_hun,d_tho)
variable cnt:std_logic_vector(2downto 0);
begin
if clk1khz'event and clk1khz='1'then
   cnt:=cnt+1;
end if;
case cnt is
   when"000"=>data<=m_one;dp<='0';scan<="00000001";
   when"001"=>data<=m_ten;dp<='0';scan<="00000010";
   when"010"=>data<=m_hun;dp<='1';scan<="00000100";
   when"011"=>data<=m_tho;dp<='0';scan<="00001000";
  when"100"=>data<=m_one;dp<='0';scan<="00010000";
   when"101"=>data<=m_ten;dp<='0';scan<="00100000";
   when"110"=>data<=m_hun;dp<='1';scan<="01000000";
   when"111"=>data<=m_tho;dp<='0';scan<="10000000";
end case;
end process;
process(data)
begin
case data is
   when"0000"=>seg7<="1111110";
when"0001"=>seg7<="0110000";
when"0010"=>seg7<="1101101";
when"0011"=>seg7<="1111001";
when"0100"=>seg7<="0110011";
when"0101"=>seg7<="1011011";
when"0110"=>seg7<="1011111";
when"0111"=>seg7<="1110000";
when"1000"=>seg7<="1111111";
when"1001"=>seg7<="1111011";
when others=>seg7<="0000000";
end case;
end process;
end;

第二個(gè)程序是這樣的