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This application note is intended to provide recommendations concerning incorporation of circuit
6 q" M6 ~1 R- h/ r' {protection devices and PCB layout guidelines to enhance an application's immunity in electrically noisy
$ p1 U; I6 F; k" ?$ menvironments and survivability of EMI, EMC, EFT, and ESD events as described in the International: r- l$ X+ w$ f: Q& F, Q7 _
Electrotechnical Commission (IEC) standards: IEC 61000-4-2, IEC 61000-4-4, and IEC 61000-4-5.
: s# q9 C# e9 e, u: o; [" \We will begin with:, i' U7 Y/ ]1 m( m
1. A brief review of EMI, EFT, and ESD specifications.
, a: L' r, C* N2. Key ESD protection device specifications definitions.
; r$ ]7 z" C" y8 ^3. A quick summary of EMI, EFT, and ESD protection strategies.
( _5 j) \4 n2 M) h0 s, ~, w! |4. Capacitor filter selection and characteristics.0 V2 U7 J5 \# o I/ ]( \' T2 C7 H
5. PCB Hardware design best practices and layout considerations checklists:+ c Z6 h4 b+ G- O/ e* b6 n$ }/ c3 w6 {
– Standard PCB design/layout practices" I; o8 t" n4 {" f4 p. k1 c
– Special Ethernet layout considerations- U4 W6 N8 Y; A/ u$ I0 j! Y$ Z
– Special DDR Layout considerations4 Q& O; o0 Z( Q1 c
6. Software protection techniques.
$ C6 |- d0 a/ `; Q- h8 G7. Microcontroller reference circuit schematics with protection examples:
0 c7 ?7 u2 T2 Q8 R8 F7 J6 W! w- {: U% A– RS-232
+ k0 ^9 V; y9 y8 |' U( B' s7 g– USB5 U" p, h* ~% X9 o+ J1 |
– CAN FD and LIN1 q" d8 u4 s: A
– Ethernet9 N) H& F9 v% O1 H! r( E7 R0 X
– Audio and mechanical switches
+ O0 t" U* j2 d- ]7 l6 H; L– LCD
+ r& S. j3 i( p– Power supplies
1 C) J! F, Z4 z! z– Reset and ICSP programming interface
% r- J3 m! P$ G. h5 e; W– SD memory card C8 p7 E/ L' x4 Z0 u& a2 c
– I2C7 J1 a$ r$ [9 Z. p, P2 K
Reference Designs Note:6 O) P# Y9 ~; j2 P
Cost pressure is a constant consideration in any design. All of the circuit components in support of the. A. R5 d1 @- E0 F" W/ `
CPU were selected based on the lowest cost and availability, which met the threat protection) S. M: t: N( d7 {1 s2 ~# x
requirements. A user should carefully consider any substitutions. It is also highly recommended that the
& m- M6 o# k3 T2 d+ ^user consider designing in the protection elements in their layout, and then depopulate with zero ohm# M) _3 c$ \- w; x; L& [( V' @. Y7 x
resistors as they think necessary, based on ESD, EMI, and EFT prototype board testing. This will save8 {* t0 G% D+ ?. z6 ?
significant board redesign time to market in the final product. |
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